TIMEOUT 45 secondstimeout set to 4[  240.740673] <LAVA_SIGNAL_ENDTC cgroup_test_cpu>
5
cgroup_test_cpu_test_cpucg_subtree_control pass
cgroup_test_cpu_test_cpucg_stats pass
cgroup_test_cpu_test_cpucg_nice pass
cgroup_test_cpu_test_cpucg_weight_overprovisioned pass
cgroup_test_cpu_test_cpucg_weight_underprovisioned pass
cgroup_test_cpu_test_cpucg_nested_weight_overprovisioned pass
cgroup_test_cpu_test_cpucg_nested_weight_underprovisioned pass
cgroup_test_cpu fail
cgroup_test_cpuset_test_cpuset_perms_object_allow pass
cgroup_test_cpuset_test_cpuset_perms_object_deny pass
cgroup_test_cpuset_test_cpuset_perms_subtree pass
cgroup_test_cpuset pass
cgroup_test_cpuset_prs_sh fail
cgroup_test_cpuset_v1_hp_sh skip