Date
May 26, 2025, 9:10 a.m.
Environment | |
---|---|
fvp-aemva-vhe | |
rk3399-rock-pi-4b-nvhe | |
rk3399-rock-pi-4b-protected | |
rk3399-rock-pi-4b-vhe |
[ 1196.236579] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses RESULT=fail> pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses fail pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail
[ 927.459545] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses RESULT=fail> pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses fail pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail
[ 276.777825] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses RESULT=fail> pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses fail pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail
[ 270.124060] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses RESULT=fail> pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses fail pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail
[ 279.551027] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses RESULT=fail> pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses fail pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail
[ 269.957591] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses RESULT=fail> pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses fail pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail
[ 269.498518] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses RESULT=fail> pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses fail pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail
[ 364.798733] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses RESULT=fail> pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses fail pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail