[ 1643.656445] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest6-overflow-is-expected-on-counter-0 RESULT=fail>
pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest6-overflow-is-expected-on-counter-0 fail

------------[ cut here ]------------
[  428.472163] Unknown PMU version 9
[  428.472359] WARNING: CPU: 1 PID: 1603 at arch/arm64/kvm/pmu-emul.c:42 kvm_pmu_create_perf_event+0x278/0x284
[  428.472545] Modules linked in: arm_spe_pmu crct10dif_ce panel_simple pl111_drm drm_dma_helper drm_kms_helper fuse drm ip_tables x_tables
[  428.472942] CPU: 1 PID: 1603 Comm: qemu-system-aar Not tainted 6.1.146-rc1 #1
[  428.473066] Hardware name: FVP Base RevC (DT)
[  428.473139] pstate: 160402009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[  428.473276] pc : kvm_pmu_create_perf_event+0x278/0x284
[  428.473411] lr : kvm_pmu_create_perf_event+0x274/0x284
[  428.473545] sp : ffff80000ab138b0
[  428.473613] x29: ffff80000ab13950 x28: ffff0008026ca100 x27: 0000000000000001
[  428.473794] x26: 00000000dbadc0de x25: aaaaaaaaaaaaaaaa x24: ffff00080111b400
[  428.473981] x23: 00000000c800c0de x22: ffff0008043c4fb0 x21: 0000000000000000
[  428.474163] x20: ffff0008043c4b80 x19: ffff0008043c6ad8 x18: ffffd7c5d5266679
[  428.474349] x17: 0000000000000001 x16: ffffffffffffffff x15: 0000000000000003
[  428.474530] x14: ffffd7c5d57bb8f8 x13: 0000000000000003 x12: 0000000000000003
[  428.474710] x11: 00000000ffffefff x10: ffffd7c5d5730a7c x9 : 9c383bd7da867e00
[  428.474894] x8 : 0000000000000000 x7 : 205d333631323734 x6 : 342e38323420205b
[  428.475075] x5 : ffffd7c5d5cd1fef x4 : ffff80000ab134e7 x3 : 0000000000000000
[  428.475256] x2 : 0000000000000000 x1 : ffff80000ab13650 x0 : 0000000000000015
[  428.475432] Call trace:
[  428.475494]  kvm_pmu_create_perf_event+0x278/0x284
[  428.475631]  kvm_pmu_handle_pmcr+0x1a0/0x210
[  428.475765]  access_pmcr+0xa4/0xd0
[  428.475905]  perform_access+0x48/0x15c
[  428.476046]  emulate_sys_reg+0xf4/0x108
[  428.476184]  kvm_handle_sys_reg+0xc8/0x1a4
[  428.476327]  handle_exit+0x9c/0x148
[  428.476452]  kvm_arch_vcpu_ioctl_run+0x490/0x900
[  428.476602]  kvm_vcpu_ioctl+0x538/0x5a4
[  428.476717]  __arm64_sys_ioctl+0x94/0xd4
[  428.476839]  invoke_syscall+0x4c/0x110
[  428.476975]  el0_svc_common+0xd0/0x118
[  428.477109]  do_el0_svc+0x30/0x98
[  428.477241]  el0_svc+0x30/0x60
[  428.477347]  el0t_64_sync_handler+0x84/0xf0
[  428.477463]  el0t_64_sync+0x18c/0x190
[  428.477569] ---[ end trace 0000000000000000 ]---

[ 1644.649131] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-overflow-interrupt-pmu-pmu-overflow-interrupt-32-bit-overflows-Odd-counter-wrapped RESULT=fail>
pmu-overflow-interrupt-pmu-pmu-overflow-interrupt-32-bit-overflows-Odd-counter-wrapped fail

[ 1644.485171] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-overflow-interrupt-pmu-pmu-overflow-interrupt-32-bit-overflows-expect-overflow-interrupt-on-even-and-odd-counter RESULT=fail>
pmu-overflow-interrupt-pmu-pmu-overflow-interrupt-32-bit-overflows-expect-overflow-interrupt-on-even-and-odd-counter fail

[ 1644.318691] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-overflow-interrupt-pmu-pmu-overflow-interrupt-32-bit-overflows-expect-overflow-interrupt RESULT=fail>
pmu-overflow-interrupt-pmu-pmu-overflow-interrupt-32-bit-overflows-expect-overflow-interrupt fail
pmu-overflow-interrupt-pmu-pmu-overflow-interrupt-32-bit-overflows-expect-overflow-interrupt-on-even-and-odd-counter fail

[ 1643.491009] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest5-32b-64b-CHAIN-counter-incremented-and-overflow RESULT=fail>
pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest5-32b-64b-CHAIN-counter-incremented-and-overflow fail

[ 1643.323050] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest4-CHAIN-counter-enabled-CHAIN-counter-was-incremented-and-overflow RESULT=fail>
pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest4-CHAIN-counter-enabled-CHAIN-counter-was-incremented-and-overflow fail

[ 1642.988496] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest3-should-have-triggered-an-overflow-on-0 RESULT=fail>
pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest3-should-have-triggered-an-overflow-on-0 fail

[ 1642.822166] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest2-odd-counter-did-not-increment-on-overflow-if-disabled RESULT=fail>
pmu-chain-promotion-pmu-pmu-chain-promotion-32-bit-overflows-subtest2-odd-counter-did-not-increment-on-overflow-if-disabled fail

[ 1642.487698] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chained-sw-incr-pmu-pmu-chained-sw-incr-32-bit-overflows-expected-overflows-and-values-after-100-SW_INCRCHAIN RESULT=fail>
pmu-chained-sw-incr-pmu-pmu-chained-sw-incr-32-bit-overflows-expected-overflows-and-values-after-100-SW_INCRCHAIN fail

[ 1642.320894] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chained-sw-incr-pmu-pmu-chained-sw-incr-32-bit-overflows-overflow-and-chain-counter-incremented-after-100-SW_INCRCHAIN RESULT=fail>
pmu-chained-sw-incr-pmu-pmu-chained-sw-incr-32-bit-overflows-overflow-and-chain-counter-incremented-after-100-SW_INCRCHAIN fail

[ 1642.152373] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-overflow-on-even-and-odd-counters RESULT=fail>
pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-overflow-on-even-and-odd-counters fail

[ 1641.986161] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-CHAIN-counter-1-wrapped RESULT=fail>
pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-CHAIN-counter-1-wrapped fail

[ 1641.821740] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-overflow-recorded-for-chained-incr-2 RESULT=fail>
pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-overflow-recorded-for-chained-incr-2 fail

[ 1641.657241] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-CHAIN-counter-1-set-to-2 RESULT=fail>
pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-CHAIN-counter-1-set-to-2 fail

[ 1641.492356] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-overflow-recorded-for-chained-incr-1 RESULT=fail>
pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-overflow-recorded-for-chained-incr-1 fail

[ 1641.325983] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-CHAIN-counter-1-incremented RESULT=fail>
pmu-chained-counters-pmu-pmu-chained-counters-32-bit-overflows-CHAIN-counter-1-incremented fail

[ 1639.841372] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters RESULT=fail>
pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail

[ 1639.672909] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses RESULT=fail>
pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses fail
pmu-mem-access-pmu-pmu-mem-access-32-bit-overflows-Ran-20-mem-accesses-with-expected-overflows-on-both-counters fail

[ 1639.342076] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pmu-basic-event-count-pmu-pmu-basic-event-count-32-bit-overflows-check-overflow-happened-on-0-only RESULT=fail>
pmu-basic-event-count-pmu-pmu-basic-event-count-32-bit-overflows-check-overflow-happened-on-0-only fail