[  181.812445] <LAVA_SIGNAL_STARTTC cgroup_test_memcontrol>
exit=1timeout set to 45
selftest[  181.824762] <LAVA_SIGNAL_ENDTC cgroup_test_memcontrol>
s: cgroup: test_pids
TAP version 13
1..2
ok 1 test_pids_max
ok 2 test_pids_events
cgroup_test_memcontrol_test_memcg_subtree_control pass
cgroup_test_memcontrol_test_memcg_current_peak fail
cgroup_test_memcontrol_test_memcg_min fail
cgroup_test_memcontrol_test_memcg_low fail
cgroup_test_memcontrol_test_memcg_high fail
cgroup_test_memcontrol_test_memcg_high_sync pass
cgroup_test_memcontrol_test_memcg_max fail
cgroup_test_memcontrol_test_memcg_reclaim fail
cgroup_test_memcontrol_test_memcg_oom_events pass
cgroup_test_memcontrol_test_memcg_swap_max_peak skip
cgroup_test_memcontrol_test_memcg_sock fail
cgroup_test_memcontrol_test_memcg_oom_group_leaf_events pass
cgroup_test_memcontrol_test_memcg_oom_group_parent_events pass
cgroup_test_memcontrol_test_memcg_oom_group_score_events pass
cgroup_test_memcontrol fail

[  181.525553] <LAVA_SIGNAL_STARTTC cgroup_test_memcontrol_test_memcg_sock>
[  181.539607] <LAVA_SIGNAL_ENDTC cgroup_test_memcontrol_test_memcg_sock>
cgroup_test_memcontrol_test_memcg_sock fail

[  181.323531] <LAVA_SIGNAL_STARTTC cgroup_test_memcontrol_test_memcg_reclaim>
[  181.337593] <LAVA_SIGNAL_ENDTC cgroup_test_memcontrol_test_memcg_reclaim>
cgroup_test_memcontrol_test_memcg_reclaim fail

[  181.248451] <LAVA_SIGNAL_STARTTC cgroup_test_memcontrol_test_memcg_max>
[  181.261774] <LAVA_SIGNAL_ENDTC cgroup_test_memcontrol_test_memcg_max>
cgroup_test_memcontrol_test_memcg_max fail

[  181.091340] <LAVA_SIGNAL_STARTTC cgroup_test_memcontrol_test_memcg_high>
[  181.105050] <LAVA_SIGNAL_ENDTC cgroup_test_memcontrol_test_memcg_high>
cgroup_test_memcontrol_test_memcg_high fail
cgroup_test_memcontrol_test_memcg_high_sync pass

[  181.002144] <LAVA_SIGNAL_STARTTC cgroup_test_memcontrol_test_memcg_low>
[  181.015917] <LAVA_SIGNAL_ENDTC cgroup_test_memcontrol_test_memcg_low>
cgroup_test_memcontrol_test_memcg_low fail

[  180.925349] <LAVA_SIGNAL_STARTTC cgroup_test_memcontrol_test_memcg_min>
[  180.939578] <LAVA_SIGNAL_ENDTC cgroup_test_memcontrol_test_memcg_min>
cgroup_test_memcontrol_test_memcg_min fail

[  180.844906] <LAVA_SIGNAL_STARTTC cgroup_test_memcontrol_test_memcg_current_peak>
[  180.859487] <LAVA_SIGNAL_ENDTC cgroup_test_memcontrol_test_memcg_current_peak>
cgroup_test_memcontrol_test_memcg_current_peak fail

[  180.712579] <LAVA_SIGNAL_STARTTC cgroup_test_kmem>
TIMEOUT 45 secondstimeout set to 45
[  180.725091] <LAVA_SIGNAL_ENDTC cgroup_test_kmem>

selftests: cgroup: test_memcontrol
ok 1 test_memcg_subtree_control
not ok 2 test_memcg_current_peak
not ok 3 test_memcg_min
not ok 4 test_memcg_low
not ok 5 test_memcg_high
ok 6 test_memcg_high_sync
not ok 7 test_memcg_max
not ok 8 test_memcg_reclaim
ok 9 test_memcg_oom_events
ok 10 # SKIP test_memcg_swap_max_peak
cgroup_test_kmem_test_kmem_basic pass
cgroup_test_kmem fail

[  179.455206] <LAVA_SIGNAL_STARTTC cgroup_test_cpu>
TIMEOUT 45 secondstimeout set to [  179.467565] <LAVA_SIGNAL_ENDTC cgroup_test_cpu>
45
selftests: cgroup: test_cpuset
ok 1 test_cpuset_perms_object_allow
cgroup_test_cpu_test_cpucg_subtree_control pass
cgroup_test_cpu_test_cpucg_stats pass
cgroup_test_cpu_test_cpucg_nice pass
cgroup_test_cpu_test_cpucg_weight_overprovisioned pass
cgroup_test_cpu_test_cpucg_weight_underprovisioned pass
cgroup_test_cpu_test_cpucg_nested_weight_overprovisioned pass
cgroup_test_cpu_test_cpucg_nested_weight_underprovisioned pass
cgroup_test_cpu fail
cgroup_test_cpuset_test_cpuset_perms_object_allow pass
cgroup_test_cpuset_test_cpuset_perms_object_deny pass
cgroup_test_cpuset_test_cpuset_perms_subtree pass
cgroup_test_cpuset pass
cgroup_test_cpuset_prs_sh skip
cgroup_test_cpuset_v1_hp_sh skip

(no logs available)

(no logs available)

(no logs available)

(no logs available)